CALICE-UK ECAL Readout Electronics
Contains links, documents, talks, etc., for the CALICE-UK ECAL electronics
- Project overview
- Project specification
(ps,
pdf)
- Schedule (ppt)
- RAL ID
website,
containing links to the Quality Management System information
- Reviews
- External interfaces and requirements
- VFE-PCB
(ps,
pdf),
proposed connectors:
JST,
SHL
(pdf),
DX
(pdf),
DMX
(pdf),
SSR
(pdf);
Hirose EXT series
(pdf),
DF19 series
(pdf);
MicroCom
pcmci connectors,
VFE-PCB connector schematic
(ps)
- Readout board cable connectors:
html
- Trigger inputs
(doc,
pdf)
- Data Acquisition
(ps,
pdf)
- System
- Overview diagram
(ps,
pdf)
- Internal interface: VME crate customisation
(doc)
- Possible PCI/VME: SBS VMEbus-PCI model
618 or
620,
Struck PCI to VME interface model SIS1100/3100,
National Instruments PCI-based VXI controller model
VXI-PCI8026
- VME crates:
Wiener
Series 6000 CERN/LHC VME 64X crate specification
(pdf)
- Trigger board
- Block diagram
(ppt,
pdf),
functional diagram
(ppt,
pdf),
description
(doc,
pdf)
- External interface: inputs (see above),
front panel layout
(ppt,
pdf)
- External interface: VME
(doc,
pdf)
- FED option readout board
- Block diagrams: front end
(ps,
pdf),
back end
(ps,
pdf),
trigger section of back end
(ps,
pdf)
- Provisional (from IDR5) schematics
(pdf),
layout
(pdf)
- User guide linked from this
website
- Readout board
- Overview
(ps,
pdf),
data paths
(pdf)
- External interface: VFE-PCB (see above),
front panel layout
(ppt,
pdf)
- External interface: VME
(pdf)
- Internal interface: master-to-slave FPGA configuration path timing
(pdf)
- Internal interface: slave-to-master FPGA data path
(ps,
pdf)
- Master FPGA: FPGA block diagram
(pdf),
pin estimate
(txt)
- Slave FPGA: FPGA block diagram, pin estimate and ADC control timing
(ps,
pdf),
missing Fig 1
(doc,
ps)
- Proposed FPGA's (Virtex-II)
- Proposed ADC: TI ADC's
overview,
(ADS8361,
ADS8364)
- Proposed DAC
(AD5543)
- Test board
- Block diagram
(ps),
functional diagram
(ppt,
pdf)
- External interface: VFE-PCB (see above),
front panel layout
(ppt,
pdf)
- External interface: VME (see above)
- Software
- CERN Hardware Access Library (HAL)
web page
- CMS FED HAL memory map file (dat)
- Meetings
- Related links
- File access
Go to the CALICE-UK home page